1. Field of the Invention
The invention relates generally to the processing of decimal numeric instructions by a microprogrammed processing system and more particularly to the apparatus which indicates to the microprogram the characteristics of the operand being processed.
2. Description of the Prior Art
Microprogrammed data processing systems include a main memory and a control memory. The main memory stores operands and instructions. The operands may be stored in various forms including decimal numeric characteristics. The instructions for defining the processing of the decimal numeric instructions include descriptors for defining the characteristics of the operands which include the decimal numeric characters.
The control memory stores a plurality of microwords. Each microword made up of a predetermined number of bits enables particular functions in the data processing system. A series of microwords called a microprogram subroutine when processed in sequence enables the data processing system to perform a particular operation.
When the data processing system reads a decimal numeric instruction from memory, a field in the instruction defining the type of decimal numeric operation, for example, add two operands and store the resultant operand, selects from the control store the first microword of a subroutine which starts the addition process.
In the prior art systems when the subroutine completes its process, another subroutine is called to determine what process the system will perform next. This next process selected will depend upon the characteristics of the operand. If the operand is a 4-bit decimal character, then one microprogrammed subroutine is selected. If the operand is a 9-bit decimal character, then another microprogrammed subroutine is selected. The continuous testing of the characteristics of the operand as each subroutine is completed reduces the overall throughput of the system considerably. During the processing of a particular decimal numeric instruction many decisions are made. Each decision point requires a subroutine to test the operand to determine the location of the first microword of the next subroutine used in the processing sequence, thereby enabling the control store to branch to that first microword.
U.S. Pat. No. 3,570,006 issued to G. S. Hoff and M. Miu, Mar. 9, 1971, entitled "Multiple Branch Technique" discloses an apparatus for effecting a multiple branching operation wherein a multiplicity of branch addresses with corresponding test conditions are pre-established and the results are stored pending the detection of a "branch and stored test" signal.
Branch address registers store digital representations corresponding to an address or a portion of an address within an associated memory. Associated with each of the branch address registers is a flop which is set as a result of the successful satisfaction of conditions existing within the system and upon which the branching operation is conditioned. A prior art system such as described in the Hoff patent contains considerable hardware to implement.